Processor progress is harder to come by these days, but Samsung says it’ll build chips next year that will give you a bit more battery life or a bit more speed.

Through improvements charted by Moore’s Law, chip electronic components called transistors get steadily smaller. On Monday, Samsung said it’s taken the next step along the Moore’s Law path, shrinking a transistor measurement to 5 billionths of a meter — 5nm — from 7nm. To get some idea of just how teensy that is, about 2,000 would fit end to end across the width of a human hair.

The new petite size means the Korean company will be able to add more electronic abilities to its chips. It also means the chips will get either a 10% speed boost or a 20% savings in power. The development could help not only Samsung, which builds the Exynos processor for its own phones, but also Qualcomm and other companies that rely on Samsung’s foundry business to build their chips.

Samsung is now letting customers build test chips with the process. As for full-on production, ‘we are expecting starting the second quarter of 2020,’ said Shawn Han, a senior vice president for Samsung’s foundry business.

Samsung is one of the survivors in an industry punished by unrelenting technical challenges. Moving to new processor manufacturing technologies requires ever-increasing expenditures on research and equipment, an economic reality that has shortened the list of major manufacturers to just three: Samsung, Intel and Taiwan Semiconductor Manufacturing Corp. (TSMC).

After years of struggle, Intel is only now building chips manufactured with 10nm technology, though its technology is capable of squeezing transistors more compactly. TSMC and Samsung are building chips with 7nm technology, a manufacturing process used in flagship phones like Apple’s iPhone XS and Samsung’s Galaxy S10.

Earlier this month, however, TSMC said it’s begun building prototype 5nm chips for customers. It said the chips can get a 15% speed boost compared to Samsung’s 10%. Because it takes more power to increase performance, chip manufacturers have to decide which characteristic is the priority.

TSMC also has an 80% increase in the number of transistors that’ll fit on a given surface area compared to Samsung’s 25% increase. TSMC didn’t detail its power consumption improvements to compare to Samsung’s 20% improvement.

New tech, new costs

Although processor makers continue to advance manufacturing technology, customers aren’t necessarily moving as quickly. For one thing, although power and performance can increase, the cost can be worse, particularly if you’re paying by the transistor.

‘It used to be you had to go to the advanced [manufacturing]. You couldn’t compete if you stayed behind,’ said Geoff Tate, chief executive of AI chip startup Flex Logix and former leader of memory chip designer Rambus. ‘Now if you go to advanced nodes like 7nm, the cost per transistor doesn’t go down much.’

Besides, the phone manufacturers have first dibs on the manufacturing capacity for the most advanced technology. ‘The phone guys are taking all the wafers,’ Tate said, referring to the thin, flat slices of silicon crystal out of which chips are made.

Ultraviolet light brings higher precision

TSMC and Samsung both use a technology called extreme ultraviolet (EUV) manufacturing, which uses shorter and therefore more precise wavelengths of light to etch patterns onto chip wafers. EUV has been under development for years, but the expense and difficulty of embracing it has slowed its arrival.

Moving from 10nm to 7nm to 5nm and beyond is only one dimension of chip improvement. Intel announced it’ll begin stacking chips with a technology called Foveros this year, increasing performance by uncorking data transfer bottlenecks and giving chipmakers new flexibility.

Such packaging technology improvements aren’t unique to Intel, though. ‘Samsung has been working on many different types of packages,’ Han said.

The company also is working on an approach that Samsung and collaborator IBM call nanosheets they expect will boost performance 50% or cut power by 75%. That was aimed at 5nm chips, but won’t be used on 5nm after all, Han said.

‘It’s coming. We are working on it,’ Han said. That’s good, because chip improvements are harder and hard to come by. ‘We are getting close to the wall.’

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